Input/output standards have varying power supply voltages depending upon the application. For example, various power supply voltages are used in the low-power double-data-rate (LPDDR) standards for the interface between mobile computers (e.g., smartphones and tablets) and synchronous dynamic random access memories. In the LPDDR3 standard, the nominal power supply voltage is 1.2V whereas it is 0.6 V for the LPDDR4X standard. In general, the power supply voltage is lowered for more modern standards to save power. There are thus I/O standards with relatively-low power supply voltages and those with relatively-high power supply voltages. A given output driver for a system-on-a-chip (SoC) for a mobile application will typically be configured for a particular I/O power supply voltage: either a high-voltage or a low-voltage power supply voltage depending upon the desired I/O standard.
It would be more efficient for an SoC manufacturer to provide a high-voltage/low-voltage output driver that can accommodate whatever standard (either high-voltage or low-voltage) that is chosen by a given customer. For example, a high-voltage output driver and a low-voltage driver could both be multiplexed to a given output terminal for an SoC. Depending upon what application is chosen by the user, the corresponding output driver would be active and selected for by the multiplexer to drive signals over the terminal to an external device. Although such a combination of output drivers may be suitable for lower-speed signaling, the multiplexing of the two output drivers onto a single output terminal loads the output terminal with a relatively high level of output capacitance. High-speed signaling over such a loaded terminal is then hindered by the excessive capacitive loading.
There is thus a need in the art for both a low-voltage data path and a high-voltage data path to interface a digital core to a hybrid output driver.